1. Field of the Invention
The invention relates to a multiplexer circuit according to the preamble of claim 1 and to an analogue-to-digital converter (ADC) comprising such a multiplexer circuit.
2. Description of the Related Art
In monolithic IC's transmission gates can be used for multiplexer circuits. They are suitable to select one of several analogue input channels to connect the selected channel, for example, to an ADC circuit on chip. Multiplexer circuits built with transmission gates implemented in monolithic IC's with MOS (metal oxide semiconductor) type circuits are known from CMOS Digital Integrated Circuits, Analysis and Design, S. M. Kang, Y. Leblebici, McGRAW-HILL INTERNATIONAL EDITIONS, ISBN 0-07-038046-5, page 274 and from Principles of CMOS VLSI Design, A System Perspective, second edition ADDISON WESLEY, N. H. E., Weste, K. Eshraghian, ISBN 0-201-53376-6, pages 17, 304.
An example of a conventional multiplexer circuit 1 comprising transmission gates is shown in FIG. 5. The multiplexer circuit 1 comprises at least two input channels IN0, IN1 which are connected with a common output channel 2. Of course, a plurality of input channels IN0, IN1, IN2, . . . INi may be provided in the multiplexer circuit. For selecting one of said analogue input channels IN0, IN1 the multiplexer circuit comprises transmission gates FT0, FT1 between the input channel IN0, IN1 and the output channel 2, respectively. The multiplexer can select one of the two input channels IN0, IN1 by select signals SELECT0, SELECT0, SELECT1, SELECT1 generated by a decoder circuit 10. The decoder circuit generates a select signal SELECT0, SELECT1 and an inverted select signal SELECT0, SELECT1 for each input channel INo, IN1, respectively, which are applied to the corresponding transmission gates FT0, FT1. The decoder circuit is a n to 2n decoder (i=2n), which ensures that only one of the select signals SELECT0 to SELECTi becomes true while the others are false, i.e. only one channel is open while the others are closed. In the example according to FIG. 4 the channel IN1 is selected i.e. the transmission gate FT1 is open, whereas the channel IN0 is not selected and the transmission gate FT0 is closed. Analog voltages U1, U2 are applied to the input channels IN0, IN1, respectively. The voltage at the output channel 2 is indicated as Uout. The transmission gates FT0, FT1 are known CMOS transmission gates comprising p channel and n channel transistors having threshold voltages VTHp and VTHn, respectively. The multiplexer circuit is operated with a power supply voltage VcC and Vss is the ground potential OV.
The operation of the multiplexer circuit is as follows. In a normal operation condition the following input voltage conditions are applied:U1=[Vss; Vcc]U2=[Vss; Vcc]
That means the level of the input voltages U1, U2 is between the power supply voltage level Vcc and Vss.
Under these conditions the transmission gates FT0 and FT1 operate as ideal switches. Since the transmission gate FT0 is closed, the voltage Uout is equal to U2:Uout=U2.
No current will flow in the multiplexer circuit, i.e. the current in the channels IN0 and IN1 is 0, respectively:Iin1=0Iout=0.
In case of an over or an under voltage applied to an input channel which is not selected i.e. which is not active a current will flow through the active channel. This is the under/over voltage operation condition. The following input voltage conditions are considered as under and over voltage conditions:
Under voltage:−VTHn+Vss≦U1≦Vss.Over voltage:Vcc≦U1≦Vcc+|VTHp|,The voltage U2 is:
U2=[Vss; Vcc].
Under these conditions the transmission gate FT0 in channel IN0 does not work as an ideal switch any more. Due to “weak inversion” and the pn-diode structures of the CMOS transistors a current flows between IN0 and IN1.|Iin|≦0|Iout|≦0
Iout creates a voltage drop at the resistance of the transmission gate FT1 in channel IN1 and the output resistance of the source of U2. Therefore, Uout is not equal to the input voltage U2 any more. Depending on the desired accuracy of the analogue signal this will be a problem.
In particular for multiplexer circuits used in ADC's a noise at the injection source leads to worse accuracy, which makes the conversion results unusable (e.g. in case of an 8-bit ADC the absolute accuracy becomes 10–11 LSB instead of +/−2 LSB). External over/undervoltage protection circuits are required in order to be able to use such ADC's.
It is an object of the invention to provide a multiplexer circuit and an analogue-to-digital converter having an improved accuracy with respect to the output of an analogue input signal.